1. Field of the Invention
The present invention relates to a photoelectric converter having a photoelectric charge storage area whose potential thereof controlled through a capacitor.
2. Related Background Art
A photoelectric converter having a photoelectric charge storage area whose potential is controlled through a capacitor is known, for example, by European Patent Publication No. 132076.
Such a converter will be briefly explained below.
FIG. 1(A) shows a plan view of the photoelectric converter and FIG. 1(B) shows a I--I cross-sectional view thereof.
Photoelectric conversion cells are arranged on an n-type silicon substrate 101 and each photoelectric conversion cell is electrically insulated from adjacent photoelectric conversion cells by a device isolation area 102 made of SiO.sub.2, Si.sub.3 N.sub.4 or polysilicon.
Each photoelectric conversion cell is constructed as follows. A p region 104 is formed on a low impurity density n.sup.- region 103 by doping with a p-type impurity (for example, boron). An and n.sup.+ region 105 is formed in the p region 104 by impurity diffusion or ion injection. The p region 104 and the n.sup.+ region 105 are the base and emitter of an NPN bipolar transistor, respectively.
An oxidation film 106 is formed on the regions formed over region 103, and a capacitor electrode 107 having a predetermined area is formed on the oxidation film 106. The capacitor electrode 107 faces the p region 104 with the oxidation film 106 being interleaved therebetween, and a potential of the floating p region 104 is controlled by applying a pulse voltage to the capacitor electrode 107.
Also formed on the cell are an emitter electrode 108 connected to the n.sup.+ region 105, wiring 109 for externally reading a signal from the emitter electrode 108, wiring 110 connected to the capacitor electrode 107, a high impurity concentration n.sup.+ region 111 on the rear side of the substrate 101, and an electrode 112 for applying a potential to the collector of the bipolar transistor.
The basic operation of such a cell will now be explained. It is assumed that the p region 104 which is the base of the bipolar transistor is initially at a negative potential. Light is applied to the p region 104 and holes of electron-hole pairs generated by the incident light are stored in the p region 104 so that the potential of the p region 104 rise toward a positive level (store operation).
Then, a positive read voltage pulse is applied to the capacitor electrode 107 while the emitter electrode 108 floats. When the positive voltage is applied to the capacitor electrode 107, the potential of the p region 104 rises so that the base-emitter is forward biased and a current flows between the collector and the emitter in accordance with the increment of the base potential in the storage operation. Accordingly, an electrical signal corresponding to the incident light intensity appears at the floating emitter electrode 108 (read operation). Since the charge stored in the p region 104 (base) does not substantially decrease, the same optical information can be repetitively read.
In order to remove the holes stored in the p region 104, the emitter electrode 108 is grounded and a refresh positive voltage pulse is applied to the capacitor electrode 107 so that the p region 104 is forward biased relative to the n.sup.+ region 105 and the stored holes are removed through the grounded emitter electrode 108. When the refresh positive voltage pulse falls, the base potential of the p region 104 resets to the initial negative potential (refresh operation). Thereafter, the store, read and refresh operations are repeated.
In the proposed system, the charge generated by the light irradiation is stored in the base p region 104 and the current flowing between the emitter electrode 108 and the collector electrode 112 is controlled by the stored charge. Accordingly, the stored charge is read after amplification by the amplification functions of the cells and hence high output, high sensitivity and low noise are attained.
However, this photoelectric converter has a problem described below.
When areas of high density integrated photoelectric conversion cells are very small, an aperture factor is very low and wiring capacitance increases. In other words, a potential V.sub.p generated by the holes stored in the base by the light excitation decreases.
The increase of the wiring capacitance may be prevented by increasing the thickness of the insulative layer between the photoelectric conversion cell and the wiring material or by using a low dielectric constant material, but the reduction of the aperture factor cannot be prevented because the wiring electrode and the device isolation area exist on the photoelectric conversion cell. As a result, the larger the circuit scale is and the higher the integration density is, the lower the output level.
In a prior art method, the die or pigment used for an on-chip color filter is deposited directly on the cell. As a result, contamination materials in the die or pigment more easily into the cell. This causes a problem in reliability.